On 6 Jul 2002, Eric W. Biederman wrote: > > OK, never mind my earlier comments. But at the very least let's make sure > > that physical addresses are allocated on page granularity -- that > > definitely has been an issue for me with standard BIOSes. I can explain > > more why if anyone wants to know. > > For what I'm doing page granularity doesn't sound like a problem. Pages > shouldn't affect the packing granularity very much. > > I have a hunch why this could be an issue but hearing a supporting story > would be nice.
Some cards (DARPA SLAAC-II) have register sets that are direct-mapped into user space. One register set on the SLAAC-II is 256 bytes. On some BIOSes the SLAAC-II register set was mapped onto the same physical page as the IDE controller memory-mapped registers. A user program which mmap'ed the SLAAC-II registers would have direct access to the SLAAC-II register set AND the IDE register set. Misbehaving SLAAC-II programs could thus scribble random junk into the IDE register set with predictably bad results. Since on some controllers some bit-patterns mean "format the drive" this could be very bad. It's why in my linuxbios PCI setup code I round all BAR sizes to 4096 bytes ... ron
