Quoting Corey Osgood <[EMAIL PROTECTED]>: > [EMAIL PROTECTED] wrote: >> Quoting [EMAIL PROTECTED]: >> >>> Hello, >>> I am working on the code for my northbridge (Intel 82830). >>> Particularly the raminit.c file. By looking at the sources from the >>> other northbridges and my datasheets, I am getting a little lost. My >>> datasheet (Intel) lists all the registers and their defaults but >>> doesn't really explain the memory initialization process. Could >>> someone direct me to some good docs that explain how memory >>> initialization happens at boot time? The more detail the better. I am >>> using SDRAM so SDRAM specific would be great. I was looking at the >>> code from the via vt8601, but it seems like alot of the registers are >>> hardcoded into the code (no disrespect Ron, I saw you converted it to >>> C). I would like to write one that is a lot more dynamic (more >>> definitions to uniqe code) so it can also be used to as sort of a >>> template for other SDRAM based northbridges. >>> >>> Thanks - Joe >>> >>> -- >>> linuxbios mailing list >>> [email protected] >>> http://www.openbios.org/mailman/listinfo/linuxbios >>> >>> >> I just have to say, after hours of reading datasheets and examining >> code that who ever wrote the code for the e7520 and e7525 nothbridges >> is brilliant!! The way the code is setup is going to work perfect for >> me and maybe other people looking for Intel northbridge code starting >> points. I think if any of you working on the 440bx should just scrap >> the existing and start over with e7520 and e7525 as a template, maybe >> not, but you might be able to get it working this way. Anyways, I just >> wanted to Acknowledge some great code writing. >> >> Thanks - Joe >> >> > > Joe, Uwe already did, and I really appreciate it ;) Although neither of > us has gotten it running yet, it definitely is a better design, I've > also been using something similar for via vt82c694 (again, no success > yet). I only wish there was some way to haul apart or examine the > factory bios to figure out what's going on with both of these chips, in > principle this should be so simple. Why does what worked with v1 not > work with v2??? > > -Corey > > Could eithor of you (Uwe or Corey) send me the 440bx files described above. I would like to take a look :)
Thanks - Joe -- linuxbios mailing list [email protected] http://www.linuxbios.org/mailman/listinfo/linuxbios
