On Tue, Apr 17, 2007 at 03:29:30PM +0200, ST wrote: > I am not 100% sure that it's an pullup but quite.
Measure resistance to Vdd with power off and power on, perhaps something can be learned. > I suspect that INIT# is not connected to the SuperIO since there is > also RST for the same functionality Are they connected together? I got the impression that RST# is the PCI reset and that INIT# comes from somewhere else. I think you mentioned that RST was constant while INIT had a changing signal during boot, but maybe I just remember wrong. > and since this board looks like a non finished DualBios. Good point. It may be a hack like a pull-up because it doesn't come with the full timer switch circuit. > But of course i'd like to hear if s.o. knows better... Me too, sorry I can't offer anything but speculation. //Peter -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
