ron minnich wrote: > Partial diff attached, .... here are comments. > > Still builds. > > > On 9/8/07, Uwe Hermann <[EMAIL PROTECTED]> wrote: > >> Add a license header, please. >
>>> +#define POST_CODE(x) outb(x, 0x80) >> We have a global implementation already. > > cache as ram is weird, I want to test this before I use the library. > The library can do lots more than outb, what with serial post and > timers etc. > I think we discussed this when the LX CAR code went in. I don't recall the exact problem but I don't think that you can use the library function at this point. >>> + >>> +} >> Is this board-specific or chipset-specific? If the latter, it should not >> be here. > > I am not sure. Marc? > I think that this was for: /* Setup access to the MC for under 1MB. Note MC not setup yet. */ Yes, I think that routing to 1MB should be generic. I think you still need the MSR function at that point for platform specific settings. Marc -- Marc Jones Senior Firmware Engineer (970) 226-9684 Office mailto:[EMAIL PROTECTED] http://www.amd.com/embeddedprocessors -- linuxbios mailing list [email protected] http://www.linuxbios.org/mailman/listinfo/linuxbios
