Dear Morgan,
please disregard my last patch. This patch is more complete and applies
to current svn HEAD.
* Change one PCI vendor ID from Nvidia to SiS
* Remove dead code
* Remove unused variables
* Fix bug where array was one element too small
* Fix error value truncation, the old code never entered the error path
* Remove warnings
Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_usb2.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_usb2.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_usb2.c (Arbeitskopie)
@@ -72,7 +72,6 @@
{
uint8_t *base;
struct resource *res;
- uint32_t temp32;
print_debug("USB 2.0 INIT:---------->\n");
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_aza.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_aza.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_aza.c (Arbeitskopie)
@@ -29,6 +29,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <arch/io.h>
+#include <delay.h>
#include "sis966.h"
uint8_t SiS_SiS7502_init[7][3]={
@@ -236,13 +237,8 @@
static void codecs_init(uint8_t *base, uint32_t codec_mask)
{
- int i;
codec_init(base, 0);
return;
- for(i=2; i>=0; i--) {
- if( codec_mask & (1<<i) )
- codec_init(base, i);
- }
}
static void aza_init(struct device *dev)
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_lpc.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_lpc.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_lpc.c (Arbeitskopie)
@@ -234,7 +234,6 @@
static void sis966_lpc_read_resources(device_t dev)
{
struct resource *res;
- unsigned long index;
/* Get the normal pci resources of this device */
pci_dev_read_resources(dev); // We got one for APIC, or one more for
TRAP
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c (Arbeitskopie)
@@ -23,7 +23,7 @@
#define SMBUS0_IO_BASE 0x8D0
-static const uint8_t SiS_LPC_init[33][3]={
+static const uint8_t SiS_LPC_init[34][3]={
{0x04, 0xF8, 0x07}, //Reg 0x04
{0x45, 0x00, 0x00}, //Reg 0x45
//Enable Rom Flash
{0x46, 0x00, 0x3D}, //Reg 0x46
@@ -444,7 +444,6 @@
device_t dev;
msr_t msr;
int i;
- uint32_t j;
uint8_t temp8;
uint16_t temp16;
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_sata.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_sata.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_sata.c (Arbeitskopie)
@@ -111,13 +111,9 @@
static void sata_init(struct device *dev)
{
- uint32_t dword;
struct southbridge_sis_sis966_config *conf;
-struct resource *res;
-uint16_t base;
-uint8_t temp8;
conf = dev->chip_info;
print_debug("SATA_INIT:---------->\n");
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_smbus.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_smbus.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_smbus.c (Arbeitskopie)
@@ -102,7 +102,6 @@
static void sis966_sm_read_resources(device_t dev)
{
- struct resource *res;
unsigned long index;
/* Get the normal pci resources of this device */
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_ctrl.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_ctrl.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_ctrl.c (Arbeitskopie)
@@ -23,14 +23,12 @@
{
device_t dev;
- /* Find the device.
- */
+ /* Find the device. */
dev = pci_locate_device_on_bus(
- PCI_ID(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_SIS_SIS966_HT),
+ PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_HT),
bus);
return (dev>>15) & 0x1f;
-
}
static void hard_reset(void)
@@ -41,6 +39,7 @@
outb(0x0a, 0x0cf9);
outb(0x0e, 0x0cf9);
}
+
static void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn)
{
/* default value for sis966 is good */
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis966_nic.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis966_nic.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis966_nic.c (Arbeitskopie)
@@ -93,9 +93,7 @@
static void set_apc(struct device *dev)
{
- uint32_t tmp;
uint16_t addr;
- uint32_t idx;
uint16_t i;
uint8_t bTmp;
@@ -139,7 +137,7 @@
#define LoopNum 200
static unsigned long ReadEEprom( struct device *dev, uint32_t base,
uint32_t Reg)
{
- uint16_t data;
+ uint32_t data;
uint32_t i;
uint32_t ulValue;
@@ -165,7 +163,7 @@
if(i==LoopNum) data=0x10000;
else{
ulValue=readl(base+0x3c);
- data = (uint16_t)((ulValue & 0xffff0000) >> 16);
+ data = ((ulValue & 0xffff0000) >> 16);
}
return data;
@@ -174,11 +172,9 @@
static int phy_read(uint32_t base, unsigned phy_addr, unsigned phy_reg)
{
uint32_t ulValue;
- unsigned loop = 0x100;
uint32_t Read_Cmd;
uint16_t usData;
- uint16_t tmp;
Read_Cmd = ((phy_reg << 11) |
@@ -188,16 +184,13 @@
// SmiMgtInterface Reg is the SMI management interface
register(offset 44h) of MAC
writel( Read_Cmd,base+0x44);
- //outl( Read_Cmd,tmp+0x44);
// Polling SMI_REQ bit to be deasserted indicated read command
completed
do
{
// Wait 20 usec before checking status
- //StallAndWait(20);
mdelay(20);
ulValue = readl(base+0x44);
- //ulValue = inl(tmp+0x44);
} while((ulValue & SMI_REQUEST) != 0);
//printk_debug("base %x cmd %lx ret val %lx\n",
tmp,Read_Cmd,ulValue);
usData=(ulValue>>16);
@@ -213,7 +206,6 @@
static int phy_detect(uint32_t base,uint16_t *PhyAddr) //BOOL PHY_Detect()
{
int bFoundPhy = FALSE;
- uint32_t Read_Cmd;
uint16_t usData;
int PhyAddress = 0;
@@ -246,16 +238,10 @@
static void nic_init(struct device *dev)
{
- uint32_t dword, old;
- uint32_t mac_h, mac_l;
- int eeprom_valid = 0;
int val;
uint16_t PhyAddr;
- struct southbridge_sis_sis966_config *conf;
- static uint32_t nic_index = 0;
uint32_t base;
struct resource *res;
- uint32_t reg;
print_debug("NIC_INIT:---------->\n");
@@ -353,68 +339,7 @@
print_debug("NIC_INIT:<----------\n");
return;
-#define RegStationMgtInf 0x44
-#define PHY_RGMII 0x10000000
- writel(PHY_RGMII, base + RegStationMgtInf);
- conf = dev->chip_info;
-
- if(conf->mac_eeprom_smbus != 0) {
-// read MAC address from EEPROM at first
-
- struct device *dev_eeprom;
- dev_eeprom = dev_find_slot_on_smbus(conf->mac_eeprom_smbus,
conf->mac_eeprom_addr);
-
- if(dev_eeprom) {
- // if that is valid we will use that
- unsigned char dat[6];
- int status;
- int i;
- for(i=0;i<6;i++) {
- status = smbus_read_byte(dev_eeprom, i);
- if(status < 0) break;
- dat[i] = status & 0xff;
- }
- if(status >= 0) {
- mac_l = 0;
- for(i=3;i>=0;i--) {
- mac_l <<= 8;
- mac_l += dat[i];
- }
- if(mac_l != 0xffffffff) {
- mac_l += nic_index;
- mac_h = 0;
- for(i=5;i>=4;i--) {
- mac_h <<= 8;
- mac_h += dat[i];
- }
- eeprom_valid = 1;
- }
- }
- }
- }
-
-// if that is invalid we will read that from romstrap
- if(!eeprom_valid) {
- unsigned long mac_pos;
- mac_pos = 0xffffffd0; // refer to romstrap.inc and romstrap.lds
- mac_l = readl(mac_pos) + nic_index; // overflow?
- mac_h = readl(mac_pos + 4);
-
- }
-
-// set that into NIC MMIO
-#define NvRegMacAddrA 0xA8
-#define NvRegMacAddrB 0xAC
- writel(mac_l, base + NvRegMacAddrA);
- writel(mac_h, base + NvRegMacAddrB);
-
- nic_index++;
-
-#if CONFIG_PCI_ROM_RUN == 1
- pci_dev_init(dev);// it will init option rom
-#endif
-
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -436,6 +361,7 @@
// .enable = sis966_enable,
.ops_pci = &lops_pci,
};
+
static const struct pci_driver nic_driver __pci_driver = {
.ops = &nic_ops,
.vendor = PCI_VENDOR_ID_SIS,
Index: LinuxBIOSv2/src/southbridge/sis/sis966/sis761.c
===================================================================
--- LinuxBIOSv2/src/southbridge/sis/sis966/sis761.c (Revision 2935)
+++ LinuxBIOSv2/src/southbridge/sis/sis966/sis761.c (Arbeitskopie)
@@ -77,8 +77,6 @@
static void sis761_read_resources(device_t dev)
{
- struct resource *resource;
- unsigned char iommu;
/* Read the generic PCI resources */
printk_debug("sis761_read_resources\n");
pci_dev_read_resources(dev);
@@ -91,56 +89,13 @@
return;
- iommu = 1;
- get_option(&iommu, "iommu");
-
- if (iommu) {
- /* Add a Gart apeture resource */
- resource = new_resource(dev, 0x94);
- resource->size = iommu?AGP_APERTURE_SIZE:1;
- resource->align = log2(resource->size);
- resource->gran = log2(resource->size);
- resource->limit = 0xffffffff; /* 4G */
- resource->flags = IORESOURCE_MEM;
- }
}
static void set_agp_aperture(device_t dev)
{
- struct resource *resource;
return;
- resource = probe_resource(dev, 0x94);
- if (resource) {
- device_t pdev;
- uint32_t gart_base, gart_acr;
-
- /* Remember this resource has been stored */
- resource->flags |= IORESOURCE_STORED;
-
- /* Find the size of the GART aperture */
- gart_acr = (0<<6)|(0<<5)|(0<<4)|((resource->gran - 25) <<
1)|(0<<0);
-
- /* Get the base address */
- gart_base = ((resource->base) >> 25) & 0x00007fff;
-
- /* Update the other northbriges */
- pdev = 0;
- while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1103,
pdev))) {
- /* Store the GART size but don't enable it */
- pci_write_config32(pdev, 0x90, gart_acr);
-
- /* Store the GART base address */
- pci_write_config32(pdev, 0x94, gart_base);
-
- /* Don't set the GART Table base address */
- pci_write_config32(pdev, 0x98, 0);
-
- /* Report the resource has been stored... */
- report_resource_stored(pdev, resource, " <gart>");
- }
- }
}
static void sis761_set_resources(device_t dev)
@@ -156,9 +111,7 @@
static void sis761_init(struct device *dev)
{
- uint32_t cmd, cmd_ref;
int needs_reset;
- struct device *f0_dev, *f2_dev;
msr_t msr;
--
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