Author: hailfinger
Date: 2007-11-05 23:35:01 +0100 (Mon, 05 Nov 2007)
New Revision: 2946
Modified:
trunk/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c
Log:
Fix the M57SLI routing table, as apparently set up from LinuxBIOS on
that board. Shift PCIe pin numbers downwards, and PCI int pins upwards.
This puts both PCI slots' int A and PCIe 16x int A into the right
position.
Signed-off-by: Torsten Duwe <[EMAIL PROTECTED]>
Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Modified: trunk/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c 2007-11-05
22:21:27 UTC (rev 2945)
+++ trunk/LinuxBIOSv2/src/mainboard/gigabyte/m57sli/mptable.c 2007-11-05
22:35:01 UTC (rev 2946)
@@ -129,13 +129,13 @@
for(j=7; j>=2; j--) {
if(!bus_mcp55[j]) continue;
for(i=0;i<4;i++) {
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00<<2)|i,
apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4);
+ smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00<<2)|i,
apicid_mcp55, 0x10 + (1+j+i)%4);
}
}
for(j=0; j<2; j++)
for(i=0;i<4;i++) {
- smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x06+j)<<2)|i,
apicid_mcp55, 0x10 + (2+i+j)%4);
+ smp_write_intsrc(mc, mp_INT,
MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x07+j)<<2)|i,
apicid_mcp55, 0x10 + (3+i+j)%4);
}
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
--
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