On Thu, Nov 15, 2007 at 03:44:07PM -0500, Ward Vandewege wrote: > There is a problem with the ck804 code in the tree when it comes to SATA > support. I've observed this on a tyan s2891, and it has been confirmed by > folks with a sun ultra40. > > This patch changes the southbridge/nvidia/ck804/ck804_early_setup.c file and > enables one extra SATA port. I've tested this on real hardware (tyan s2891). > > There is a very similar file called > southbridge/nvidia/ck804/ck804_early_setup_car.c which seems to be used by > > tyan/s2895 > sunw/ultra40 > > I don't have access to a s2895, but YH thinks that all sata ports should work > on that board. It would be great if someone could verify that. > > I'm not 100% sure why both the ck804_early_setup.c and the > ck804_early_setup_car.c file are included in the mainboards/sunw/ultra40/ > tree; probably only one of those files is actually used. > > I've spent quite a bit of time with 'dumpio' and tried to match register > values between the proprietary BIOS and LinuxBIOS, but to no avail. If > someone has ideas to get port 1 working on both sata controllers, that would > be great.
*ping*, do I get an ack? Thanks, Ward. > > The ck804 code in the LB tree does not properly initialize all SATA ports. > The situation is currently as follows for boards with 4 SATA ports: > > * sata controller 0: both ports 100% dead (no drives detected) > * sata controller 1: port 0 ok; port 1 sees drive but times out when trying > to access it > > The attached patch fixes port 0 on controller 0; port 1 on both controllers > is still half-broken (as in it sees the drive initially but times out when > trying to access it). > > This patch will affect the boards that use the > southbridge/nvidia/ck804/ck804_early_setup.c file: > > sunw/ultra40 > tyan/s2891 > tyan/s2892 > asus/a8n_e > > Signed-off-by: Ward Vandewege <[EMAIL PROTECTED]> > > > Index: ck804_early_setup.c > =================================================================== > --- LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_early_setup.c > (revision 2974) > +++ LinuxBIOSv2/src/southbridge/nvidia/ck804/ck804_early_setup.c > (working copy) > @@ -228,6 +228,18 @@ > RES_PORT_IO_32, CK804B_ANACTRL_IO_BASE + 0x24, 0xfcffff0f, > 0x020000b0, > #endif > > + // Activate master port on primary SATA controller > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0x50), ~(0x1f000013), > 0x15000013, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0x64), ~(0x00000001), > 0x00000001, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0x68), ~(0x02000000), > 0x02000000, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0x70), ~(0x000f0000), > 0x00040000, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0xa0), ~(0x000001ff), > 0x00000150, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0xac), ~(0xffff8f00), > 0x02aa8b00, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0x7c), ~(0x00000010), > 0x00000000, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0xc8), ~(0x0fff0fff), > 0x000a000a, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0xd0), ~(0xf0000000), > 0x00000000, > + RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+7 , 0, 0xe0), ~(0xf0000000), > 0x00000000, > + > RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x50), ~(0x1f000013), > 0x15000013, > RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x64), ~(0x00000001), > 0x00000001, > RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE+8 , 0, 0x68), ~(0x02000000), > 0x02000000, > -- > linuxbios mailing list > linuxbios@linuxbios.org > http://www.linuxbios.org/mailman/listinfo/linuxbios > > !DSPAM:473cafad297961804284693! -- Ward Vandewege <[EMAIL PROTECTED]> Free Software Foundation - Senior System Administrator -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
