On 10.01.2008 12:14, Florentin Demetrescu wrote: > Hi all, > > I started working on this problem this week and there are some strange things > I > have found so far. >
Thanks for trying to figure this out! > First, the behaviour I noticed when starting flashrom after booting whith LB : > 1) flashrom needs to be given the board type in command line parameter (-m > gigabyte:m57sli) otherwise it is unable to recognize this board. On the other > hand it seems to correctly recognize the SB type (mcp55) and the SIO too > (it8716). It seems that it succeeds in reading and writting the configuration > registers of the SIO (those accesible through the 0x2e - 0x2f pair of IO > ports) > at least.. > It seems the board identifiers used inside LB and inside flashrom differ. > 2) the real problem is that it hangs when trying to access the SPI interface > of > the SIO, more precisely when pooling the "busy flag" of the configuration > register of the SPI interface before sending a SPI command, normally mapped at > the 0x820 IO address. Indeed when dumping the value which is read @ this > address, one get a value 0xff! It doesn't seem to me that this register should > have normally this value, there seem to be a problem with the decoding of this > IO address range into the mcp55 SB very probably.. > Yes indeed. > 3) the most strange thing is that when probing with an oscilloscope the SPI > signals, there _IS_ indeed a burst of activity on the CLK line when executing > flashrom. Some code into flashrom seems to generate this activity, but I > haven't > That's the classic parallel flash probing which reads from and writes to the memory area of the chip. > found so far where it is triggerd. But from the flashrom point of view there > is > no reponse from the spi interface so it hangs.. > Yes, that's the SPI probing which waits on the status register as you said. > Rudolf Marek suggested after an irc discussion that there could be problems > with > the GPIO configuration, but I don't think so, because if that would be the > case > then we couldn't access the SIO at all and the platform wouldn't boot at all > with LB. But who knows? Rudolf, can you be more specific about this GPIO > hypothesis?.. > For my part I continue to think that there is a problem with the IO address > decoding into the PCI->LPC bridge in mcp55.. Yinghai, can you help please? > Yinghai? Is there some mcp55 conf we need to change? Regards, Carl-Daniel -- linuxbios mailing list linuxbios@linuxbios.org http://www.linuxbios.org/mailman/listinfo/linuxbios
