On 12.01.2008 01:45, ron minnich wrote:
> For reference here is the geode lx disable car. CAR is at 80000. The
> steps are to re-enable cache (for loop), then dirty all the tags for
> the CAR area (cld; rep movsl; etc); then write it all back (wbinvd).
>
> Works really well.
>
> for (i = 0; i < ARRAY_SIZE(msr_table); i++)
> wrmsr(msr_table[i].msrnum, msr_table[i].msr);
>
> __asm__ __volatile__("cld; rep movsl" ::"D" (DCACHE_RAM_BASE),
> "S" (DCACHE_RAM_BASE), "c" (DCACHE_RAM_SIZE/4): "memory");
>
> __asm__ __volatile__ ("wbinvd\n");
>
> Would be great if this worked on k8.
>
Do you want CAR to start at 0x80000 and end at 0x87FFF or do you want it
to start at 0x78000 and end at 0x7FFFF? I'm assuming the former.
Try this: (no guarantees at all)
Signed-off-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]>
Index: LinuxBIOSv2-myCAR/src/cpu/amd/car/cache_as_ram.inc
===================================================================
--- LinuxBIOSv2-myCAR/src/cpu/amd/car/cache_as_ram.inc (Revision 3044)
+++ LinuxBIOSv2-myCAR/src/cpu/amd/car/cache_as_ram.inc (Arbeitskopie)
@@ -19,7 +19,7 @@
*/
#define CacheSize DCACHE_RAM_SIZE
-#define CacheBase (0xd0000 - CacheSize)
+#define CacheBase (0x88000 - CacheSize)
/* leave some space for global variable to pass to RAM stage */
#define GlobalVarSize DCACHE_RAM_GLOBAL_VAR_SIZE
@@ -181,6 +181,7 @@
#error Invalid CAR size, is not a multiple of 4k. This is a processor
limitation.
#endif
+#if 0
#if CacheSize > 0x8000
/* enable caching for 32K-64K using fixed mtrr */
movl $0x268, %ecx /* fix4k_c0000*/
@@ -191,6 +192,14 @@
/* enable caching for 0-32K using fixed mtrr */
movl $0x269, %ecx /* fix4k_c8000*/
simplemask CacheSize, 0
+#endif
+#if CacheSize != 0x8000
+#error The new code wants CacheSize to be exactly 32k for now.
+#endif
+ /* Enable caching from 0x80000-0x87FFF */
+ movl $0x00000606, %eax
+ xorl %edx, %edx
+ movl $0x258, %ecx
wrmsr
/* enable memory access for first MBs using top_mem */
--
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