On Mon, 22 Jan 2001, Marcus wrote:
> I have had a few things that I can't explain happen while
> debugging and was wondering if you had any ideas what might be going
> on. When I was trying to debug the what was being written to the SMBus
> io registers I setup a series of delays after writing the information
> to the POST card so I could see multiple values on one debug pass. The
> first thing was that with multiple loops they became a shorter delay
> for each loop (is this the Level 1 cache at work ... except it only
> needs to go once round the loop to cache it and it was a macro so the
> loops were different code in different positions) and I was getting
> different values back from the registers on multiple runs of the code.
> Now this might make you think that it isn't being set properly ... but
I think unless you do this in user mode it will drive you insane. Try that
first.
You can send me a flash image and I'll try it later this week.
ron
