Eric,

The Geode uses a beefed up 486 core - the core was derived from the Cyrix
486 core, which they have ported to smaller processes (I believe they are
using .18 micron now), in order to get it clocking faster - they also added
a single MMX unit to it which is why NSC puts it into the 'Pentium' class.
Being based on the Cyrix core, I would hazard an informed guess that the tsc
is NOT implemented, hence the new tsc based timer code from etherboot will
probably not work.

I have been working for a while on STPC support for LinuxBIOS - the STPC
also uses the Cyrix core, and does not have tsc.

I am looking for a bit of guidance and would like input from you and others
on the list on this issue.

I have now managed to set up interrupts in PMODE and have implemented a
timer routine using the PIT - this is running fine under LinuxBIOS - the
trick is where should we put this code for the long term.

Having interrupts working in LinuxBIOS could also be useful for setting up a
keyboard ISR which could be useful for LinuxBIOS, but do we want to add
these routines to LinuxBIOS itself, or should we add them to individual
portions of code which may need them?

I have been toying with the following idea:

Set up the IDT in LinuxBIOS
Implement a timer ISR in LinuxBIOS and have that put the timer tick into RAM
location 0040:006C - (I don't think we need worry about the midnight
crossover flag because this code will never run for more than a few seconds,
so we should never get to that long a time period)
By doing this and not setting the CONFIG_TSC_CURRTICKS in etherboot, we
should be up and running.
I could then also chuck in a keyboard ISR so we can select the boot method -
I will have to look into the keyboard stuff in etherboot and make an
appropriate handler.

Regards

Hamish

-----Original Message-----
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED]]On Behalf Of Eric W. Biederman
Sent: Friday, August 03, 2001 2:05 AM
To: Peter Stuge
Cc: LinuxBIOS
Subject: Re: Bicuits & PC's


Peter Stuge <[EMAIL PROTECTED]> writes:

> On Thu, Aug 02, 2001 at 05:20:18PM -0600, Eric W. Biederman wrote:
> > Peter Stuge <[EMAIL PROTECTED]> writes:
> >
> > > We're using the NSC Geode SC12x0, which is a system-on-chip thing with
a GX1
>
> > > CPU core.  It's "almost" a Pentium/586, a kernel compiled for Pentium
works
> > > fine on it.
> >
> > If you have at least a 586 there is code in etherboot that can use
> > the rdtsc instruction for a timer.  Which is where I was going.n
>
> Where, exactly?
>
> I've got 5.0.2 and am not finding anything in there that doesn't rely on
the
> PIT.  Also no matches when grep -i rdtsc *c in src/.

Hmm.  I didn't change the short term timer as that wasn't a problem, but
I did the change the long term one.  See etherbooot 5.1.1.  I know the code
made it to there.

Eric

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