Gigabit Dual BIOS and other questions

[Jan Kok]

Ollie, thanks for answering some of my questions.  I will include that information in my next version of the Porting HOWTO I'm working on.   Ron, could you put the porting HOWTO that you mentioned on the LinuxBIOS web site, or at least send me a copy?  And while you're at it, could you cause the traffic on this email list to be archived again?  Right now it seems it's not being archived.   I think it was Ollie who mentioned working with the Gigabit Dual BIOS technology a month or so ago.  Do you have any information that you could share about how it works?  If you have the patent numbers, that might be a start.   I have been trying to get an OLD motherboard based on a SiS 85C460ATQ working with LinuxBIOS, but haven't even gotten to the point of being able to display a POST code.  The processor executes the jump instruction at ffff0, jumps to 0, and executes a few instructions after that (I can get a rough view of what is happening by looking at the BIOS EPROM with a logic analyzer), but the board seems to reset itself or branch back to ffff0 frequently.  I'm thinking the SiS glue chip may not be set up, so the POST codes aren't getting out the ISA bus, and the board is resetting for who-knows-what reason.  Maybe there is a watchdog reset on the board?   At any rate, can someone point me to the programming information for the SiS chip?   If not, I will need to get another motherboard.  My preference would be the Gigabit GA-7DXR, because it is a modern, high performance board, supports DDR and ECC (I would think the compute cluster people would like that), and has the Dual BIOS which should get around the hot swapping procedure.  (I'm not afraid of shocks, but I would worry about damaging the FLASH part or the board.)  Hence my question about how Dual BIOS works.  Does anyone have other comments about this board, or can suggest another board that has high performance and ECC?   Thanks, - Jan