Ollie Lho <[EMAIL PROTECTED]> writes: > How does your code handle different command set/block size of various > flash parts ??
The mtd kernel code is broken up into 4 different major chunks. - The generic infrastructure and block and character drivers - The command sets. (cfi_cmdset_0001(intel) cfi_cmdset_0002(amd)) - The probe drivers jedec_probe.c is for the non-cfi flash chips - The map drivers these figure out how to get writes to the flash chip, so they handle write enables and non memory mapped chips. There is a table (someday to be giant) in jedec_probe.c that lists all of the supported chips, search by chip id. The table lists the command set the device size, and the erase sizes of that device. The code is not all mine I just rely on and bugfix the infrastructure. As of today most of my code is in the MTD cvs tree, so it should be more readily available to people, including an l440gx driver, and AMD766 driver, and a intel 82801 ICH2 driver. To add support for a new flash chip only takes a 5 line table entry. Most of the time you will also need to write a map driver as well, to handle either the chipsets or the motherboards weird notion of where to put the flash write enable bit. But on boards where no one clears the write enable you can get by with the physmap driver. Once you have a map driver you can read/write erase it, (but keep your map driver a module if you are doing hot swap). And you can run interesting things like jffs on it. Eric
