* Eric W. Biederman <[EMAIL PROTECTED]> [020425 00:55]:
> > Either way, it's the speed of the slowest device in the system, so it's
> > guaranteed to be "enough". But on a PCI-only system, "enough" is a lot
> > less.
>
> Why is one bus cycle enough?
When it's used to wait for certain accesses to hardware to be done,
if you wait for the slowest device in that system to get an access
through, you can be sure all others do as well?
> If I plug in a PCI post card when I have ISA bus devices that should
> break the delay.
I read these cards are only "listening", i.e. not "grabbing" an access.
It will be shown on PCI but also passed through, because the post card
does nothing. I never tried this though and I have no idea whether it is
at all possible not to grab while listening.
> I understand how the delay works, what I do not understand is why
> one bus cycle is enough.
Hm.. like a "soft memory barrier"?
Stefan
--
Ok hex 4666 dup negate do i 4000 dup 2* negate do " *" 0 dup 2dup 1e 0 do
2swap * e >>a 2* 5 pick + -rot - j + dup dup * e >>a rot dup dup * e >>a
rot swap 2dup + 10000 > if 3drop 3drop " " 0 dup 2dup leave then loop
2drop 2drop type 268 +loop cr drop 5de +loop
