> Basically this patch just setups pcchips m758lmr+ directory, it uses the > same code as winfast 6300. I have verified the patch and it should work with > the lastest cvs. For those who don't familar with m758lmr+, it supports Intel's > latest Tualatin Celeron/PIII processors, eg.Celeron/PIII 1.0GA, 1.1GA, 1.2G,...; > on the other hand, Winfast 6300 doesn't supports all these chips. Please let me > know if there is any problem. Thanks. Oops. Forgot my attachment.
-- Andrew Ip Email: [EMAIL PROTECTED] Tel: (852) 2542 2046 Fax: (852) 2542 2046 Mobile: (852) 9201 9866 Cwlinux Limited 18B Tower 1 Tern Centre, 237 Queen's Road Central, Hong Kong. For my public pgp key, please obtain it from http://www.keyserver.net/en.
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/Config
freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/Config
--- freebios/src/mainboard/pcchips/m758lmr+/Config Thu Jan 1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/Config Thu Jun 6 01:50:34
+2002
@@ -0,0 +1,22 @@
+arch i386
+mainboardinit cpu/i386/entry16.inc
+mainboardinit cpu/i386/entry32.inc
+ldscript cpu/i386/entry16.lds
+ldscript cpu/i386/entry32.lds
+
+mainboardinit superio/sis/950/setup_serial.inc
+mainboardinit pc80/serial.inc
+mainboardinit arch/i386/lib/console.inc
+mainboardinit cpu/p6/earlymtrr.inc
+
+northsouthbridge sis/630
+nsuperio sis/950 com1={1} floppy=1 lpt=1
+
+option ENABLE_FIXED_AND_VARIABLE_MTRRS
+option FINAL_MAINBOARD_FIXUP
+option HAVE_PIRQ_TABLE=1
+object mainboard.o
+object irq_tables.o
+keyboard pc80
+cpu p5
+cpu p6
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/dll.inc
freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/dll.inc
--- freebios/src/mainboard/pcchips/m758lmr+/dll.inc Thu Jan 1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/dll.inc Thu Jun 6 01:50:34
+2002
@@ -0,0 +1,15 @@
+/* Table for DLL Clock Control Register (0x8c - 0x8f), these
+ register values are very Mainboard specific */
+
+# High Byte -> Register Low Byte -> Value
+#ifndef SIS630S
+ .word 0x8c66
+ .word 0x8d66
+ .word 0x8e03
+ .word 0x8f55
+#else /* SIS630S */
+ .word 0x8c27 # set Clock DLL control register
+ .word 0x8d77 # 0x8c ~ 0x8f,
+ .word 0x8e01 # these values are very M/B
+ .word 0x8f07 # specific
+#endif /* SIS630S */
\ No newline at end of file
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/irq_tables.c
freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/irq_tables.c
--- freebios/src/mainboard/pcchips/m758lmr+/irq_tables.c Thu Jan 1 08:00:00
1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/irq_tables.c Thu Jun 6
+01:50:34 2002
@@ -0,0 +1,64 @@
+#include <arch/pirq_routing.h>
+
+#ifndef SIS630S
+#define CHECKSUM 0xe6
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE, /* u32 signature */
+ PIRQ_VERSION, /* u16 version */
+ 32+16*5, /* there can be total 5 devices on the bus */
+ 0x00, /* Bus 0 */
+ 0x08, /* Device 1, Function 0 */
+ 0x0A20, /* reserve IRQ 11, 9, 5, for PCI */
+ 0x1039, /* Silicon Integrated System */
+ 0x0008, /* SiS 85C503/5513 ISA Bridge */
+ 0x00, /* u8 miniport_data - "crap" */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ CHECKSUM, /* u8 checksum - mod 256 checksum must give zero */
+ {
+ /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link,
+bitmap}, slot, rfu */
+ {0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42,
+0xdef8}},
+ 0x01, 0x00},
+ {0x00, 0x60, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43,
+0xdef8}},
+ 0x02, 0x00},
+ {0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00,
+0xdef8}},
+ 0x00, 0x00},
+ {0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44,
+0xdef8}},
+ 0x00, 0x00},
+ {0x00, 0x0a, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44,
+0xdef8}},
+ 0x00, 0x00},
+ }
+};
+
+#else /* SIS630S */
+#define CHECKSUM 0x21
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE, /* u32 signature */
+ PIRQ_VERSION, /* u16 version */
+ 32+16*7, /* there can be total 5 devices on the bus */
+ 0x00, /* Bus 0 */
+ 0x08, /* Device 1, Function 0 */
+ 0x1c20, /* reserve IRQ 12, 11, 9, 5, for PCI */
+ 0x1039, /* Silicon Integrated System */
+ 0x0008, /* SiS 85C503/5513 ISA Bridge */
+ 0x00, /* u8 miniport_data - "crap" */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ CHECKSUM, /* u8 checksum - mod 256 checksum must give zero */
+ {
+ /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link,
+bitmap}, slot, rfu */
+ {0x00, 0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41,
+0xdef8}},
+ 0x01, 0x00},
+ {0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42,
+0xdef8}},
+ 0x02, 0x00},
+ {0x00, 0x68, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43,
+0xdef8}},
+ 0x03, 0x00},
+ {0x00, 0x78, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44,
+0xdef8}},
+ 0x04, 0x00},
+ {0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00,
+0xdef8}},
+ 0x00, 0x00},
+ {0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44,
+0xdef8}},
+ 0x00, 0x00},
+ {0x00, 0x0a, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44,
+0xdef8}},
+ 0x00, 0x00},
+ }
+};
+#endif /* SIS630S */
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/mainboard.c
freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c
--- freebios/src/mainboard/pcchips/m758lmr+/mainboard.c Thu Jan 1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c Thu Jun 6
+01:54:03 2002
@@ -0,0 +1,20 @@
+#include <printk.h>
+
+void
+mainboard_fixup(void)
+{
+}
+
+void
+final_mainboard_fixup(void)
+{
+ void final_southbridge_fixup(void);
+ void final_superio_fixup(void);
+
+ printk_info("PCCHIPS m758lmr+ (and similar)...");
+
+ final_southbridge_fixup();
+#ifndef USE_NEW_SUPERIO_INTERFACE
+ final_superio_fixup();
+#endif
+}
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/mainboard.c~
freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c~
--- freebios/src/mainboard/pcchips/m758lmr+/mainboard.c~ Thu Jan 1 08:00:00
1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c~ Thu Jun 6
+01:51:12 2002
@@ -0,0 +1,20 @@
+#include <printk.h>
+
+void
+mainboard_fixup(void)
+{
+}
+
+void
+final_mainboard_fixup(void)
+{
+ void final_southbridge_fixup(void);
+ void final_superio_fixup(void);
+
+ printk_info("PCCHIPS m758+lmr (and similar)...");
+
+ final_southbridge_fixup();
+#ifndef USE_NEW_SUPERIO_INTERFACE
+ final_superio_fixup();
+#endif
+}
diff -Nur freebios/util/config/m758lmr+.config
freebios.m758lmr+/util/config/m758lmr+.config
--- freebios/util/config/m758lmr+.config Thu Jan 1 08:00:00 1970
+++ freebios.m758lmr+/util/config/m758lmr+.config Thu Jun 6 02:06:03 2002
@@ -0,0 +1,58 @@
+# Sample config file for PCCHIPS m758lmr+ with DoC Millennium (as root)
+
+# This will make a target directory of m758lmr+
+target /usr/src/linuxbios/buildrom/m758lmr+
+
+# PCCHIPS m758lmr+
+mainboard pcchips/m758lmr+
+
+# Enable Serial Console for debugging
+option SERIAL_CONSOLE=1
+
+# enable debugging support
+option DEBUG=1
+
+# enable serial post for debugging
+option SERIAL_POST=1
+
+# set default consol loglevel
+option DEFAULT_CONSOLE_LOGLEVEL=9
+
+# enable floppy support
+# option MUST_ENABLE_FLOPPY
+
+# enable keyboard support
+# option NO_KEYBOARD
+
+# use ELF boot
+# option USE_ELF_BOOT=1
+
+# enable RAM test
+# option RAMTEST
+
+# PIRQ tables
+# option HAVE_PIRQ_TABLE=1
+
+# don't use old kernel hack
+# option OLD_KERNEL_HACK
+
+# Enable MicroCode update and L2 Cache init for PII and PIII
+option UPDATE_MICROCODE=1
+option CONFIGURE_L2_CACHE=1
+option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
+
+
+# Use the internal VGA frame buffer device
+option HAVE_FRAMEBUFFER=1
+
+# Path to your kernel (vmlinux)
+linux /usr/src/linuxbios/linux
+
+# Kernel command line parameters
+# enable serial console
+ commandline root=/dev/nftla1 console=ttyS0,115200 console=tty0
+video=sisfb:640x480-8@60,font:VGA8x16
+# disable serial console
+# commandline root=/dev/nftla1 console=/dev/tty5 CONSOLE=/dev/tty5
+video=sisfb:640x480-8@60,font:VGA8x16
+
+docipl northsouthbridge/sis/630/ipl.S
+option USE_DOC_MIL=1
msg05677/pgp00000.pgp
Description: PGP signature
