On Thu, Aug 09, 2007 at 12:28:20AM -0500, Kumar Gala wrote:
>
> On Aug 8, 2007, at 11:00 AM, Josh Boyer wrote:
>
> > On Wed, 8 Aug 2007 10:20:45 -0500
> > Kumar Gala <[EMAIL PROTECTED]> wrote:
> >
> >>
> >> On Aug 6, 2007, at 11:20 PM, David Gibson wrote:
> >>
> >>> The 440 family of processors don't have a tlbie instruction. So, we
> >>> implement TLB invalidates by explicitly searching the TLB with
> >>> tlbsx.,
> >>> then clobbering the relevant entry, if any. Unfortunately the
> >>> PID for
> >>> the search needs to be stored in the MMUCR register, which is also
> >>> used by the TLB miss handler. Interrupts were enabled in _tlbie
> >>> (), so
> >>> an interrupt between loading the MMUCR and the tlbsx could cause
> >>> incorrect search results, and thus a failure to invalide TLB entries
> >>> which needed to be invalidated.
> >>>
> >>> This patch fixes the problem in both arch/ppc and arch/powerpc by
> >>> inhibiting interrupts (even critical and debug interrupts) across
> >>> the
> >>> relevant instructions.
> >>>
> >>> Signed-off-by: David Gibson <[EMAIL PROTECTED]>
> >>> ---
> >>> Paul, this one's a bugfix, which I think should go into 2.6.23.
> >>
> >> Did you actually see this happen?
> >
> > Yes.
>
> When?
>
> We don't have critical wired to anything, I don't expect watchdog to
> cause another fault.. so just wondering.
On debug (trace) interrupts on blue gene.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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