On Wed, Sep 05, 2007 at 03:08:28PM -0700, Dan Malek wrote: > All of this worked in 2.4, many changes were part > of the evolution in 2.6... configurable pinned entries, > large page sizes, variations, I didn't keep track of > all of this. I just assumed I'd have to fix it all if I > ever needed to use it, which I haven't. The original > version of 8xx could wire exactly three entries for > 8M text, 8M data, and 8M IMMR plus upper device > addresses. We would set the IMMR to ff800000, > cover the CPM, some other devices and the flash > at the top of memory.
The IMMRs I've seen from the bootloader are ff000000 (Freescale boards) and fa200000 (Embedded Planet). AFAICT, the number of fixed TLB entries is fixed at 4 on these chips, so using the fourth for flash wouldn't take away any general-purpose TLB entries. > >I didn't change it on a whim, I changed it because ioremap() wasn't > >working the way it currently is. > > This processor is severely resource limited. It's > far better to fix ioremap and take advantage of this > performance enhancement than to further > cripple it. Just like other processors test for > mapping by BATs or CAMs, the 8xx and > probably 4xx should test for wired mapping. I certainly agree that it would be nice to check -- my immediate goal is to get things working, though. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
