On Tue, 2016-01-03 at 04:15:13 UTC, "Aneesh Kumar K.V" wrote: > This is needed so that we can support both hash and radix page table > using single kernel. Radix kernel uses a 4 level table. > > We now use physical address in upper page table tree levels. Even though > they are aligned to their size, for the masked bits we use the > bit positions as per PowerISA 3.0. > > Signed-off-by: Aneesh Kumar K.V <[email protected]>
Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/368ced78e6ed3d72c2acc61233 cheers _______________________________________________ Linuxppc-dev mailing list [email protected] https://lists.ozlabs.org/listinfo/linuxppc-dev
