Erratum A-007907 can cause a core hang under certain circumstances.
Part of the workaround involves not stashing to L1 Cache. On affected
chips, stash to L2 when L1 is requested.
Signed-off-by: Scott Wood <scottw...@freescale.com>
Signed-off-by: Varun Sethi <varun.se...@freescale.com>
Signed-off-by: Shengzhou Liu <shengzhou....@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubota...@nxp.com>
---
drivers/iommu/fsl_pamu.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index c64cdef..a00c473 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -25,6 +25,7 @@
#include <linux/genalloc.h>
#include <asm/mpc85xx.h>
+#include <asm/reg.h>
/* define indexes for each operation mapping scenario */
#define OMI_QMAN 0x00
@@ -534,6 +535,16 @@ void get_ome_index(u32 *omi_index, struct device *dev)
*omi_index = OMI_QMAN_PRIV;
}
+static bool has_erratum_a007907(void)
+{
+ u32 pvr = mfspr(SPRN_PVR);
+
+ if (PVR_VER(pvr) == PVR_VER_E6500 && PVR_REV(pvr) <= 0x20)
+ return true;
+
+ return false;
+}
+
/**
* get_stash_id - Returns stash destination id corresponding to a
* cache type and vcpu.
@@ -551,6 +562,9 @@ u32 get_stash_id(u32 stash_dest_hint, u32 vcpu)
int len, found = 0;
int i;
+ if (stash_dest_hint == PAMU_ATTR_CACHE_L1 && has_erratum_a007907())
+ stash_dest_hint = PAMU_ATTR_CACHE_L2;
+
/* Fastpath, exit early if L3/CPC cache is target for stashing */
if (stash_dest_hint == PAMU_ATTR_CACHE_L3) {
node = of_find_matching_node(NULL, l3_device_ids);
--
1.9.3
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