On 08.06.2016 12:44, Michael Ellerman wrote:
> On Wed, 2016-06-08 at 11:14 +1000, Balbir Singh wrote:
>> On 31/05/16 20:32, Michael Ellerman wrote:
>>> On Tue, 2016-05-31 at 12:19 +0200, Thomas Huth wrote:
>>>> On 31.05.2016 12:04, Michael Ellerman wrote:
>>>>> On Tue, 2016-05-31 at 07:51 +0200, Thomas Huth wrote:
>>>>>> If we do not provide the PVR for POWER8NVL, a guest on this
>>>>>> system currently ends up in PowerISA 2.06 compatibility mode on
>>>>>> KVM, since QEMU does not provide a generic PowerISA 2.07 mode yet.
>>>>>> So some new instructions from POWER8 (like "mtvsrd") get disabled
>>>>>> for the guest, resulting in crashes when using code compiled
>>>>>> explicitly for POWER8 (e.g. with the "-mcpu=power8" option of GCC).
>>>>>>
>>>>>> Signed-off-by: Thomas Huth <th...@redhat.com>
>>>>>
>>>>> So this should say:
>>>>>
>>>>>   Fixes: ddee09c099c3 ("powerpc: Add PVR for POWER8NVL processor")
>>>>>
>>>>> And therefore:
>>>>>
>>>>>   Cc: sta...@vger.kernel.org # v4.0+
>>>>>
>>>>> Am I right?
>>>>
>>>> Right. (At least for virtualized systems ... for bare-metal systems,
>>>> that original patch was enough). So shall I resubmit my patch with these
>>>> two lines, or could you add them when you pick this patch up?
>>>
>>> Thanks, I'll add them here.
>>
>> Don't we need to update IBM_ARCH_VEC_NRCORES_OFFSET as well?
> 
> Yep, patch sent this morning.

Ok, looks like BenH already posted a patch ... anyway, what do you think
about aborting the boot process here in case cores != NR_CPUS, rather
than just printing out a small warning which can easily get lost in the
kernel log?

 Thomas

_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

Reply via email to