On Mon, 2017-02-27 at 23:03 +1100, Michael Ellerman wrote: > It took me a while to parse that. > > So because of the way the OPAL XICS emulation is implemented, setting > the CPPR to DEFAULT_PRIORITY has the effect of masking all > interrupts. > > That is because the OPAL code internally maps all priorities that are > > > 0 and < 0xff to a single priority. It happens to use 7, but I don't > think that matters does it? It's just that there's no differentiation > between DEFAULT and IPI. > > I realise we need to work around it anyway, but are we calling this a > bug in the XICS emulation? Or just an alternate feature? :) > > Have we thought about doing the fix in icp_opal_set_cpu_priority() > instead?
The fix in OPAL is doable but requires churn. I would have to do IPIs differently (the way I do them in KVM XICS emulation actually which is noticeably better). I will eventually do it I think but for now, I favor this patch instead because the existing code is also broken for Balbir WIP patch that removes the separate priority for IPIs to do lazy masking in the XICS. Cheers, Ben.
