On Fri, 2017-03-24 at 22:27 +0100, Giuseppe Lippolis wrote: > > > Therefore the code crash during the call in: > bl setup_common_caches > > > I'm using the iomega_150d based on the MPC8347. > > Do you have some tips about the setup_common_caches?
Once caching is enabled[1] you won't be able to do I/O until the MMU is set up for an uncached I/O mapping. -Scott [1] Or at some similar point during early init. It's been a while since I worked on chips like this, so I don't recall the details of which caches are enabled on kernel entry and whether there's some magic to exempt I/O, but I do remember there being a stretch of time during init where doing I/O was a problem.