Patch adds support for detection of thread IMC events. It adds a new
domain IMC_DOMAIN_THREAD and it is determined with the help of the
compatibility string "ibm,imc-counters-thread" based on the IMC device
tree.
Signed-off-by: Anju T Sudhakar <a...@linux.vnet.ibm.com>
Signed-off-by: Hemant Kumar <hem...@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/imc-pmu.h | 2 ++
arch/powerpc/perf/imc-pmu.c | 1 +
arch/powerpc/platforms/powernv/opal-imc.c | 18 +++++++++++++++++-
3 files changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/imc-pmu.h
b/arch/powerpc/include/asm/imc-pmu.h
index bf5fb7c..6260e61 100644
--- a/arch/powerpc/include/asm/imc-pmu.h
+++ b/arch/powerpc/include/asm/imc-pmu.h
@@ -49,6 +49,7 @@
#define IMC_DTB_COMPAT "ibm,opal-in-memory-counters"
#define IMC_DTB_NEST_COMPAT "ibm,imc-counters-nest"
#define IMC_DTB_CORE_COMPAT "ibm,imc-counters-core"
+#define IMC_DTB_THREAD_COMPAT "ibm,imc-counters-thread"
/*
* Structure to hold per chip specific memory address
@@ -98,6 +99,7 @@ struct imc_pmu {
*/
#define IMC_DOMAIN_NEST 1
#define IMC_DOMAIN_CORE 2
+#define IMC_DOMAIN_THREAD 3
#define IMC_DOMAIN_UNKNOWN -1
#define IMC_COUNTER_ENABLE 1
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c
index fb71825..9767714 100644
--- a/arch/powerpc/perf/imc-pmu.c
+++ b/arch/powerpc/perf/imc-pmu.c
@@ -41,6 +41,7 @@ struct imc_pmu *core_imc_pmu;
/* Needed for sanity check */
extern u64 nest_max_offset;
extern u64 core_max_offset;
+extern u64 thread_max_offset;
PMU_FORMAT_ATTR(event, "config:0-20");
static struct attribute *imc_format_attrs[] = {
diff --git a/arch/powerpc/platforms/powernv/opal-imc.c
b/arch/powerpc/platforms/powernv/opal-imc.c
index 23507d7..940f6b9 100644
--- a/arch/powerpc/platforms/powernv/opal-imc.c
+++ b/arch/powerpc/platforms/powernv/opal-imc.c
@@ -35,6 +35,7 @@
u64 nest_max_offset;
u64 core_max_offset;
+u64 thread_max_offset;
static int imc_event_prop_update(char *name, struct imc_events *events)
{
@@ -119,6 +120,10 @@ static void update_max_value(u32 value, int pmu_domain)
if (core_max_offset < value)
core_max_offset = value;
break;
+ case IMC_DOMAIN_THREAD:
+ if (thread_max_offset < value)
+ thread_max_offset = value;
+ break;
default:
/* Unknown domain, return */
return;
@@ -362,7 +367,7 @@ static struct imc_events *imc_events_setup(struct
device_node *parent,
/*
* imc_pmu_create : Takes the parent device which is the pmu unit and a
* pmu_index as the inputs.
- * Allocates memory for the pmu, sets up its domain (NEST/CORE), and
+ * Allocates memory for the pmu, sets up its domain (NEST/CORE/THREAD), and
* calls imc_events_setup() to allocate memory for the events supported
* by this pmu. Assigns a name for the pmu. Calls imc_events_node_parser()
* to setup the individual events.
@@ -483,6 +488,17 @@ static void __init imc_pmu_setup(struct device_node
*parent)
return;
pmu_count++;
}
+ /*
+ * Loop through the imc-counters tree for each compatible
+ * "ibm,imc-counters-thread", and update "struct imc_pmu".
+ */
+ for_each_compatible_node(child, NULL, IMC_DTB_THREAD_COMPAT) {
+ domain = IMC_DOMAIN_THREAD;
+ rc = imc_pmu_create(child, pmu_count, domain);
+ if (rc)
+ return;
+ pmu_count++;
+ }
}
static int opal_imc_counters_probe(struct platform_device *pdev)
--
2.7.4
