From: Simon Guo <wei.guo.si...@gmail.com>
Apple G5 machines(PPC970/FX/GX/MP) have supervisor mode disabled and
MSR HV bit is forced into 1. We should follow this in PR KVM guest.
This patch set MSR HV=1 for G5 machines and HV=0 for others on PR
KVM guest.
Signed-off-by: Simon Guo <wei.guo.si...@gmail.com>
Suggested-by: Paul Mackerras <pau...@ozlabs.org>
---
arch/powerpc/kvm/book3s_pr.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index 7ec866a..b2f7566 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -320,6 +320,7 @@ static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
{
ulong guest_msr = kvmppc_get_msr(vcpu);
ulong smsr = guest_msr;
+ u32 guest_pvr = vcpu->arch.pvr;
/* Guest MSR values */
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -334,7 +335,16 @@ static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
smsr |= (guest_msr & vcpu->arch.guest_owned_ext);
/* 64-bit Process MSR values */
#ifdef CONFIG_PPC_BOOK3S_64
- smsr |= MSR_ISF | MSR_HV;
+ smsr |= MSR_ISF;
+
+ /* for PPC970 chip, its HV bit is hard-wired to 1. For others,
+ * we should clear HV bit.
+ */
+ if ((PVR_VER(guest_pvr) == PVR_970) ||
+ (PVR_VER(guest_pvr) == PVR_970FX) ||
+ (PVR_VER(guest_pvr) == PVR_970MP) ||
+ (PVR_VER(guest_pvr) == PVR_970GX))
+ smsr |= MSR_HV;
#endif
vcpu->arch.shadow_msr = smsr;
}
--
1.8.3.1
