On Wed, 2018-03-28 at 09:53 +0100, Will Deacon wrote: > For arm/arm64 these end up behaving exactly the same as readX/writeX, but > I'm nervous about changing the documentation without understanding why it's > like it is currently. Maybe another ia64 thing?.
I doubt it ... the Intel ancestry here would make me think they are completely ordered there too. powerpc and ARM can't quite make them synchronous I think, but at least they should have the same semantics as writel. Cheers, Ben.
