Hey How does HVSC works ? I looked in the code and LoPAR documentation. It looks like there is vector called system_call_pSeries ( at 0xc00 ) that is supposed to be called when we invoke HVSC from kernel mode. Now, I wrote a NULL call HSVC and patched the exceptions-64s.S to return RFID immediately. This does not work. Would you be so kind to explain how HVSC works ? thank you
On Thu, Oct 4, 2018 at 1:16 PM Gabriel Paubert <paub...@iram.es> wrote: > > On Thu, Oct 04, 2018 at 10:41:13AM +0300, Raz wrote: > > Frankly, the more I read the more perplexed I get. For example, > > according to BOOK III-S, chapter 3, > > the MSR bits are differ from the ones described in > > arch/powerpc/include/asm/reg.h. > > Bit zero, is LE, but in the book it is 64-bit mode. > > Just a problem of bit order definitions: IBM hardware definitions use > big-endian bit ordering, where bit 0 is the most significant bit. > > > > > Would someone be kind to explain what I do not understand? > > > > Thank you > > Gabriel