On Wed, Feb 06, 2019 at 05:28:37PM +1100, Russell Currey wrote: > Without restoring the IAMR after idle, execution prevention on POWER9 > with Radix MMU is overwritten and the kernel can freely execute userspace > without > faulting. > > This is necessary when returning from any stop state that modifies user > state, as well as hypervisor state. > > To test how this fails without this patch, load the lkdtm driver and > do the following: > > echo EXEC_USERSPACE > /sys/kernel/debug/provoke-crash/DIRECT > > which won't fault, then boot the kernel with powersave=off, where it > will fault. Applying this patch will fix this. > > Fixes: 3b10d0095a1e ("powerpc/mm/radix: Prevent kernel execution of user > space") > Cc: <sta...@vger.kernel.org> > Signed-off-by: Russell Currey <rus...@russell.cc> > --- > arch/powerpc/include/asm/cpuidle.h | 1 + > arch/powerpc/kernel/asm-offsets.c | 1 + > arch/powerpc/kernel/idle_book3s.S | 20 ++++++++++++++++++++ > 3 files changed, 22 insertions(+) > > diff --git a/arch/powerpc/include/asm/cpuidle.h > b/arch/powerpc/include/asm/cpuidle.h > index 43e5f31fe64d..ad67dbe59498 100644 > --- a/arch/powerpc/include/asm/cpuidle.h > +++ b/arch/powerpc/include/asm/cpuidle.h > @@ -77,6 +77,7 @@ struct stop_sprs { > u64 mmcr1; > u64 mmcr2; > u64 mmcra; > + u64 iamr; > }; > > #define PNV_IDLE_NAME_LEN 16 > diff --git a/arch/powerpc/kernel/asm-offsets.c > b/arch/powerpc/kernel/asm-offsets.c > index 9ffc72ded73a..10e0314c2b0d 100644 > --- a/arch/powerpc/kernel/asm-offsets.c > +++ b/arch/powerpc/kernel/asm-offsets.c > @@ -774,6 +774,7 @@ int main(void) > STOP_SPR(STOP_MMCR1, mmcr1); > STOP_SPR(STOP_MMCR2, mmcr2); > STOP_SPR(STOP_MMCRA, mmcra); > + STOP_SPR(STOP_IAMR, iamr); > #endif > > DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER); > diff --git a/arch/powerpc/kernel/idle_book3s.S > b/arch/powerpc/kernel/idle_book3s.S > index 7f5ac2e8581b..bb4f552f6c7e 100644 > --- a/arch/powerpc/kernel/idle_book3s.S > +++ b/arch/powerpc/kernel/idle_book3s.S > @@ -200,6 +200,12 @@ pnv_powersave_common: > /* Continue saving state */ > SAVE_GPR(2, r1) > SAVE_NVGPRS(r1) > + > +BEGIN_FTR_SECTION > + mfspr r5, SPRN_IAMR > + std r5, STOP_IAMR(r13) > +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) > +
Are we trying to add for both power8 and power9 ? power9 would be CPU_FTR_ARCH_300.