Hi!

On Sat, May 09, 2020 at 03:03:40PM +1000, Paul Mackerras wrote:
> +     __asm__ volatile("mtmsrd %3,0; ldcix %0,%1,%2; mtmsrd %4,0"
> +                      : "=r" (val) : "b" (potato_uart_base), "r" (offset),
> +                        "r" (msr & ~MSR_DR), "r" (msr));

That should be  "=&r"(val)  (an earlyclobber), because when %0 is
written, %4 will still be used later.

Looks fine otherwise.

Reviewed-by: Segher Boessenkool <seg...@kernel.crashing.org>


Segher

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