On Mon, 13 Jul 2020 20:16:23 +0530, Madhavan Srinivasan wrote: > IMC trace-mode record has MSR[HV PR] bits added in the third DW. > These bits can be used to set the cpumode for the instruction pointer > captured in each sample. > > Add support in kernel to use these bits to set the cpumode for > each sample.
Applied to powerpc/next. [1/1] powerpc/perf: Add kernel support for new MSR[HV PR] bits in trace-imc https://git.kernel.org/powerpc/c/77ca3951cc37727ae8361d583a30da7a1b84e427 cheers