We want to move away from using SMT prioroty updates for cpu_relax, and
use a 'wait' instruction which is similar to x86. As well as being a
much better fit for what everybody else uses and tests with, priority
nops are stateful which is nasty (interrupts have to consider they might
be taken at a different priority), and they're expensive to execute,
similar to a mtSPR which can effect other threads in the pipe.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
Unfortunately qemu TCG does not emulate pause_short properly and will
cause hangs. I have a patch for it but not merged yet. But if we tune
qspinlock code it would be best to do it with this patch.
Thanks,
Nick
arch/powerpc/include/asm/processor.h | 30 +++++++++++++++++++----
arch/powerpc/include/asm/vdso/processor.h | 10 +++++++-
2 files changed, 34 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index fdfaae194ddd..61f16515cbe0 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -355,11 +355,31 @@ static inline unsigned long __pack_fe01(unsigned int
fpmode)
#ifdef CONFIG_PPC64
-#define spin_begin() HMT_low()
-
-#define spin_cpu_relax() barrier()
-
-#define spin_end() HMT_medium()
+#define spin_begin() \
+do { \
+ asm volatile(ASM_FTR_IFCLR( \
+ "or 1,1,1", /* HMT_LOW */ \
+ "nop",/* POWER10 onward uses pause_short (wait 2,0) */ \
+ %0) :: "i" (CPU_FTR_ARCH_31) : "memory"); \
+} while (0)
+
+#define spin_cpu_relax() \
+do { \
+ asm volatile(ASM_FTR_IFCLR( \
+ /* Pre-POWER10 uses low ; medium priority nops */ \
+ "nop", \
+ /* POWER10 onward uses pause_short (wait 2,0) */ \
+ PPC_WAIT_BOOKS(2, 0), \
+ %0) :: "i" (CPU_FTR_ARCH_31) : "memory"); \
+} while (0)
+
+#define spin_end() \
+do { \
+ asm volatile(ASM_FTR_IFCLR( \
+ "or 2,2,2", /* HMT_MEDIUM */ \
+ "nop",/* POWER10 onward uses pause_short (wait 2,0) */ \
+ %0) :: "i" (CPU_FTR_ARCH_31) : "memory"); \
+} while (0)
#endif
diff --git a/arch/powerpc/include/asm/vdso/processor.h
b/arch/powerpc/include/asm/vdso/processor.h
index 8d79f994b4aa..1116230ebb08 100644
--- a/arch/powerpc/include/asm/vdso/processor.h
+++ b/arch/powerpc/include/asm/vdso/processor.h
@@ -22,7 +22,15 @@
#endif
#ifdef CONFIG_PPC64
-#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
+#define cpu_relax() \
+do { \
+ asm volatile(ASM_FTR_IFCLR( \
+ /* Pre-POWER10 uses low ; medium priority nops */ \
+ "or 1,1,1 ; or 2,2,2", \
+ /* POWER10 onward uses pause_short (wait 2,0) */ \
+ PPC_WAIT_BOOKS(2, 0), \
+ %0) :: "i" (CPU_FTR_ARCH_31) : "memory"); \
+} while (0)
#else
#define cpu_relax() barrier()
#endif
--
2.35.1
