On 29/09/2023 05:11, Athira Rajeev wrote:
> Running shellcheck on tests/shell/test_arm_coresight.sh
> throws below warnings:
> 
>       In tests/shell/test_arm_coresight.sh line 15:
>       cs_etm_path=$(find  /sys/bus/event_source/devices/cs_etm/ -name cpu* 
> -print -quit)
>                   ^--^ SC2061: Quote the parameter to -name so the shell 
> won't interpret it.
> 
>       In tests/shell/test_arm_coresight.sh line 20:
>               if [ $archhver -eq 5 -a "$(printf "0x%X\n" $archpart)" = 
> "0xA13" ] ; then
>                                    ^-- SC2166: Prefer [ p ] && [ q ] as [ p 
> -a q ] is not well defined
> 
> This warning is observed after commit:
> "commit bb350847965d ("perf test: Update cs_etm testcase for Arm ETE")"
> 
> Fixed this issue by using quoting 'cpu*' for SC2061 and
> using "&&" in line number 20 for SC2166 warning
> 
> Fixes: bb350847965d ("perf test: Update cs_etm testcase for Arm ETE")
> Signed-off-by: Athira Rajeev <atraj...@linux.vnet.ibm.com>
> ---
>  tools/perf/tests/shell/test_arm_coresight.sh | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/perf/tests/shell/test_arm_coresight.sh 
> b/tools/perf/tests/shell/test_arm_coresight.sh
> index fe78c4626e45..f2115dfa24a5 100755
> --- a/tools/perf/tests/shell/test_arm_coresight.sh
> +++ b/tools/perf/tests/shell/test_arm_coresight.sh
> @@ -12,12 +12,12 @@
>  glb_err=0
>  
>  cs_etm_dev_name() {
> -     cs_etm_path=$(find  /sys/bus/event_source/devices/cs_etm/ -name cpu* 
> -print -quit)
> +     cs_etm_path=$(find  /sys/bus/event_source/devices/cs_etm/ -name 'cpu*' 
> -print -quit)
>       trcdevarch=$(cat ${cs_etm_path}/mgmt/trcdevarch)
>       archhver=$((($trcdevarch >> 12) & 0xf))
>       archpart=$(($trcdevarch & 0xfff))
>  
> -     if [ $archhver -eq 5 -a "$(printf "0x%X\n" $archpart)" = "0xA13" ] ; 
> then
> +     if [ $archhver -eq 5 ] && [ "$(printf "0x%X\n" $archpart)" = "0xA13" ] 
> ; then
>               echo "ete"
>       else
>               echo "etm"


Reviewed-by: James Clark <james.cl...@arm.com>

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