> -----Original Message-----
> From: Anton Vorontsov [mailto:[EMAIL PROTECTED] 
> Sent: Monday, September 01, 2008 9:35 PM
> To: Kumar Gala
> Cc: linuxppc-dev@ozlabs.org; Li Yang-R58472
> Subject: [RFC PATCH 2/2 v2] powerpc/83xx: mpc836x_mds: add 
> support for USBHost
> 
> Various changes to support QE USB Host on a MPC8360E-MDS board:
> 
> - Update the device tree per QE USB bindings;
> - Configure QE Par IO;
> - Set up BCSR for both USB Host and Peripheral modes;
> - Add timer (GTM) node;
> - Add gpio-controller node for BCSR13 bank;
> - Select FSL_GTM, QE_GPIO and OF_SIMPLE_GPIO.
> 
> The work is loosely based on Li Yang's patch[1], which is 
> used to support peripheral mode only.
> 
> [1] http://ozlabs.org/pipermail/linuxppc-dev/2008-August/061357.html
> 
> The s-o-b line of the original patch preserved here.
> 
> Signed-off-by: Li Yang <[EMAIL PROTECTED]>
> Signed-off-by: Anton Vorontsov <[EMAIL PROTECTED]>

{snip}
> @@ -297,11 +328,20 @@
>               };
>  
>               [EMAIL PROTECTED] {
> -                     compatible = "qe_udc";
> +                     compatible = "fsl,mpc8360-qe-usb",
> +                                  "fsl,mpc8323-qe-usb";
>                       reg = <0x6c0 0x40 0x8b00 0x100>;
>                       interrupts = <11>;
>                       interrupt-parent = <&qeic>;
> -                     mode = "slave";
> +                     fsl,fullspeed-clock = "clk21";
> +                     fsl,lowspeed-clock = "brg9";
> +                     gpios = <&qe_pio_b  2 0   /* USBOE */
> +                              &qe_pio_b  3 0   /* USBTP */
> +                              &qe_pio_b  8 0   /* USBTN */
> +                              &qe_pio_b  9 0   /* USBRP */
> +                              &qe_pio_b 11 0   /* USBRN */
> +                              &bcsr13    5 0   /* SPEED */
> +                              &bcsr13    4 1>; /* POWER */


Nothing against this node.  But I don't think gpio nodes can replaces par_io 
nodes.  Gpios are focusing on the pins which are directly manipulated by the 
core, but par_io are for pins used by internal SoCs.

- Leo
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