On Thursday 04 September 2008 17:01:21 Gunnar Von Boehn wrote: >[...] > Regarding the 5121. > David, you did create a very special memcopy for the 5121e CPU. > Your test showed us that the normal glibc memcopy is about 10 times > slower than expected on the 5121. > > I really wonder why this is the case. > I would have expected the 5121 to perform just like the 5200B. > What we saw is that switching from READ to WRITE and back is very > costly on 5121. > > There seems to be a huge difference between the 5200 and its successor the > 5121. Is this performance difference caused by the CPU or by the board > /memory?
I have some new insight now, and I will look more closely at the working of the DRAM controller... there has to be something wrong somewhere, an I am going to find it... whether it is some strange bug in my u-boot code (initializing the DRAM controller and prio-manager for example) or a silicon-errata (John?) Thanks a lot for your help so far. -- David Jander _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev