On 4/4/26 8:35 PM, Marek Vasut wrote:
Add support for setting the Bit Clock Swap bit in CR2 register via new "fsl,sai-bit-clock-swap" DT property. This bit swaps the bit clock used by the transmitter or receiver in asynchronous mode, i.e. makes transmitter use RX_BCLK and TX_SYNC, and vice versa, makes receiver use TX_BCLK and RX_SYNC.
Is there anything left over to do with this patch ?
