Save and restore the LTR maximum latency registers through the per-device saved capability store instead of a private pci_cap_saved_state buffer.
Reserve the DWORD by its configuration space offset during device setup, in pci_reserve_ltr_state(), and keep accessing the registers a DWORD at a time because some devices only support DWORD access to them. No functional change intended. Signed-off-by: David Matlack <[email protected]> --- drivers/pci/pci.c | 8 +------- drivers/pci/pci.h | 1 + drivers/pci/pcie/aspm.c | 31 ++++++++++++++++--------------- 3 files changed, 18 insertions(+), 22 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 6cf4a64cb7e6..29d9474db1ae 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3742,15 +3742,9 @@ int pci_add_ext_cap_save_buffer(struct pci_dev *dev, u16 cap, unsigned int size) */ void pci_allocate_cap_save_buffers(struct pci_dev *dev) { - int error; - pci_reserve_pcie_state(dev); pci_reserve_pcix_state(dev); - - error = pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_LTR, - 2 * sizeof(u16)); - if (error) - pci_err(dev, "unable to allocate suspend buffer for LTR\n"); + pci_reserve_ltr_state(dev); pci_allocate_acs_save_buffer(dev); pci_allocate_vc_save_buffers(dev); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 206e0d04e06e..0daa2439db5e 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -1151,6 +1151,7 @@ int pcie_retrain_link(struct pci_dev *pdev, bool use_lt); /* ASPM-related functionality we need even without CONFIG_PCIEASPM */ void pci_save_ltr_state(struct pci_dev *dev); +void pci_reserve_ltr_state(struct pci_dev *dev); void pci_restore_ltr_state(struct pci_dev *dev); void pci_configure_aspm_l1ss(struct pci_dev *dev); void pci_save_aspm_l1ss_state(struct pci_dev *dev); diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 02922b887ec6..39adf2cad331 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -30,8 +30,6 @@ void pci_save_ltr_state(struct pci_dev *dev) { int ltr; - struct pci_cap_saved_state *save_state; - u32 *cap; if (!pci_is_pcie(dev)) return; @@ -40,31 +38,34 @@ void pci_save_ltr_state(struct pci_dev *dev) if (!ltr) return; - save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state) { - pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n"); + /* Some broken devices only support dword access to LTR */ + pci_save_cap_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT); +} + +void pci_reserve_ltr_state(struct pci_dev *dev) +{ + int ltr, rc; + + ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); + if (!ltr) return; - } - /* Some broken devices only support dword access to LTR */ - cap = &save_state->cap.data[0]; - pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap); + rc = pci_reserve_saved_cap(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, sizeof(u32)); + if (rc) + pci_err(dev, "unable to reserve LTR save state (%pe)\n", + ERR_PTR(rc)); } void pci_restore_ltr_state(struct pci_dev *dev) { - struct pci_cap_saved_state *save_state; int ltr; - u32 *cap; - save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR); ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR); - if (!save_state || !ltr) + if (!ltr) return; /* Some broken devices only support dword access to LTR */ - cap = &save_state->cap.data[0]; - pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap); + pci_restore_cap_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT); } void pci_configure_aspm_l1ss(struct pci_dev *pdev) -- 2.56.0.455.g6c5a503b38-goog
