Laurent Pinchart wrote:
On Thursday 20 November 2008, Scott Wood wrote:
This makes things worse on mpc8272ads -- the result of the division is
13.56, but I only get error-free serial output when rounding down. I
don't think the remote end has timing problems, as I don't see this with
any other board.
I get exactly the opposite here with an mpc8248 base board. Rounding down
makes 115200bds completely unreliable :-/
Hmm... In that case, I'm OK with the patch as it's technically more
correct, and clearly what we want if the quotient comes out to something
like 13.95. Maybe mpc8272ads board code could apply some sort of tweak
to the brg frequency.
The right answer is probably that if you want reliable standard baud
rates, the board designer should ensure a suitable clock is available,
rather than picking some random clock and hoping it divides nicely.
Could you measure the serial baudrate with and without the patch using an
oscilloscope ?
Not easily; I'm a software person and would have to track down someone
to lend me one and show me how to use it. I may try using ntpdate to
measure timebase drift, as it should be off by the same percentage.
Maybe we should change CPM_CLK to be MAIN_CLK/4 rather than MAIN_CLK/16
when the BRG clock is below a certain frequency.
Isn't that the job of the boot loader ?
Sure, I didn't necessarily mean "linux" by "we". :-)
Accuracy would be improved, but power
consumption will raise as well :-/
Granted... though it's actually BRG_CLK and not CPM_CLK that I meant, so
hopefully it wouldn't make too much of a difference in power.
-Scott
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