Hi Guys:
Sequoia uses on board discrete memory with one rank. So one chip
select would be fine.
Turning on both won't matter, since the other cs is never used.
Feng Kan
Stefan Roese wrote:
On Wednesday 11 March 2009, Valentine Barshak wrote:
I've been looking at the docs once again and actually I couldn't find an
explanation there. And I don't have that e-mail from AMCC support
that I got a while back regarding the issue anymore.
There might have been some misunderstanding.
The docs (PPC440EPX UM 19.2 Device Address Mapping) say that the chip
select field width is always fixed at one bit, but this doesn't actually
mean that there's always one chip select used.
The patch works fine on Sequoia and another Sequoia-like board with 1GB
RAM installed, but it might not work with 2GB RAM. I've tried to play
with DDR0_10 settings and Sequoia works fine regardless of what's
actually written to DDR0_10.
So, probably the best way would be to fix that in u-boot
amcc/sequoia/sdram.c by doing mtsdram(DDR0_10, 0x00000100); instead of
mtsdram(DDR0_10, 0x00000300);
Sorry, for confusion, but after reviewing the docs, I think that
only REDUC interpretation has to be fixed. The chips select part should
be fixed in u-boot sdram code for Sequoia as was originally proposed by
Mikhail.
Stefan, could you please take a look?
I'll apply the U-Boot patch today. But as Josh pointed out, we should try to
find a way for the bootwrapper to work in all cases.
Best regards,
Stefan
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