>Subject: Re: [PATCH 2/3] fsl_rio: fix non-standard HID1 register access > > >On Oct 13, 2010, at 9:04 PM, Shaohui Xie wrote: > >> From: Li Yang <le...@freescale.com> >> >> The access to HID1 register is only legitimate for e500 v1/v2 cores. >> Also fixes magic number. >> >> Signed-off-by: Li Yang <le...@freescale.com> >> Signed-off-by: Shaohui Xie <b21...@freescale.com> >> --- >> arch/powerpc/sysdev/fsl_rio.c | 9 ++++++--- >> 1 files changed, 6 insertions(+), 3 deletions(-) >> >> diff --git a/arch/powerpc/sysdev/fsl_rio.c >> b/arch/powerpc/sysdev/fsl_rio.c index 4127636..dfff3b7 100644 >> --- a/arch/powerpc/sysdev/fsl_rio.c >> +++ b/arch/powerpc/sysdev/fsl_rio.c >> @@ -1537,9 +1537,12 @@ int fsl_rio_setup(struct platform_device *dev) >> #ifdef CONFIG_E500 >> saved_mcheck_exception = ppc_md.machine_check_exception; >> ppc_md.machine_check_exception = fsl_rio_mcheck_exception; -#endif >> - /* Ensure that RFXE is set */ >> - mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); >> + >> +#ifndef CONFIG_PPC_E500MC >> + /* Ensure that RFXE is set on e500 v1/v2 */ >> + mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | HID1_RFXE)); #endif /* >> +!PPC_E500MC */ #endif /* E500 */ > >I've never really been happy with this code. We really should set >HID1_RFXE in cpu_setup_fsl_booke.S instead.
But this bit is not recommended to be set unless necessary. And it is only required by SRIO for now. - Leo _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
