The CPU_FTR_* values are pretty tight (a few bits left) yes I need to save and
restore the QPX registers.
There are 32 QPX registers, each 32 bytes in size, it is otherwise managed by
the FPSCR and MSR[FP]
I was thinking that I could hijack the VSX, since there is no plan to add it to
embedded yet.
I could be explicit or create an alieas fo the same bit, but the basic effect
(after increasing the save area size) would be something like the diff below.
Thoughts?
-jx
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index de36955..adb08af 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -25,14 +25,24 @@
#include <asm/asm-offsets.h>
#include <asm/ptrace.h>
-#ifdef CONFIG_VSX
+#if defined (CONFIG_VSX) && defined(CONFIG_BGQ)
+# error "This code depends on CONFIG_VSX and CONFIG_BGQ being exclusive
+#elif defined (CONFIG_VSX)
+# define _REST_32VSRS(n,c,base) REST_32VSRS(n,c,base)
+# define _SAVE_32VSRS(n,c,base) SAVE_32VSRS(n,c,base)
+#elif defined(CONFIG_BGQ)
+# define _REST_32VSRS(n,c,base) REST_32QRS(n,c,base)
+# define _SAVE_32VSRS(n,c,base) SAVE_32QRS(n,c,base)
+#endif
+
+#if defined (CONFIG_VSX) || defined(CONFIG_BGQ)
#define REST_32FPVSRS(n,c,base)
\
BEGIN_FTR_SECTION \
b 2f; \
END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
REST_32FPRS(n,base); \
b 3f; \
-2: REST_32VSRS(n,c,base); \
+2: _REST_32VSRS(n,c,base); \
3:
#define SAVE_32FPVSRS(n,c,base)
\
@@ -41,7 +51,7 @@ BEGIN_FTR_SECTION
\
END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
SAVE_32FPRS(n,base); \
b 3f; \
-2: SAVE_32VSRS(n,c,base); \
+2: _SAVE_32VSRS(n,c,base); \
3:
#else
#define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
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