Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
limited to 8Mbytes. This patch adds the capability to select the size of initial
memory between 8/16/24 Mbytes and this is regardless of whether CONFIG_PIN_TLB
is active or not. It allows to load "big" kernels (for instance when activating
CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
Signed-off-by: Christophe Leroy <christophe.le...@c-s.fr>
diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -980,6 +980,29 @@
config PIN_TLB
bool "Pinned Kernel TLBs (860 ONLY)"
depends on ADVANCED_OPTIONS && 8xx
+
+choice
+ prompt "Initial Data Memory Mapped on 8xx"
+ default 8xx_MAP_8M
+ depends on ADVANCED_OPTIONS && 8xx
+
+config 8xx_INIT_MAP_8M
+ bool "8 Mbytes"
+
+config 8xx_INIT_MAP_16M
+ bool "16 Mbytes"
+
+config 8xx_INIT_MAP_24M
+ bool "24 Mbytes"
+
+endchoice
+
+config 8xx_INIT_MAP
+ hex
+ default 0x01800000 if 8xx_INIT_MAP_24M
+ default 0x01000000 if 8xx_INIT_MAP_16M
+ default 0x00800000
+
endmenu
if PPC64
diff -ur a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -841,11 +841,13 @@
ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */
mtspr SPRN_MD_RPN, r8
-#ifdef CONFIG_PIN_TLB
+#if defined (CONFIG_8xx_INIT_MAP_16M) || defined (CONFIG_8xx_INIT_MAP_24M)
/* Map two more 8M kernel data pages.
*/
+#ifdef CONFIG_PIN_TLB
addi r10, r10, 0x0100
mtspr SPRN_MD_CTR, r10
+#endif
lis r8, KERNELBASE@h /* Create vaddr for TLB */
addis r8, r8, 0x0080 /* Add 8M */
@@ -858,15 +860,19 @@
addis r11, r11, 0x0080 /* Add 8M */
mtspr SPRN_MD_RPN, r11
+#ifdef CONFIG_8xx_INIT_MAP_24M
+#ifdef CONFIG_PIN_TLB
addi r10, r10, 0x0100
mtspr SPRN_MD_CTR, r10
+#endif
addis r8, r8, 0x0080 /* Add 8M */
mtspr SPRN_MD_EPN, r8
mtspr SPRN_MD_TWC, r9
addis r11, r11, 0x0080 /* Add 8M */
mtspr SPRN_MD_RPN, r11
-#endif
+#endif /* CONFIG_8xx_INIT_MAP_24M */
+#endif /* CONFIG_8xx_INIT_MAP_16M || CONFIG_8xx_INIT_MAP_24M */
/* Since the cache is enabled according to the information we
* just loaded into the TLB, invalidate and enable the caches here.
diff -ur a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -213,12 +213,8 @@
*/
BUG_ON(first_memblock_base != 0);
-#ifdef CONFIG_PIN_TLB
/* 8xx can only access 24MB at the moment */
- memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01800000));
-#else
- /* 8xx can only access 8MB at the moment */
- memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000));
-#endif
+ memblock_set_current_limit(min_t(u64, first_memblock_size,
+ CONFIG_8xx_INIT_MAP));
}
#endif /* CONFIG_8xx */
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