On Fri, 2014-05-30 at 17:59 +0300, Laurentiu Tudor wrote: > Virtualized environments expose a e6500 dual-threaded core > as two single-threaded e6500 cores.
s/expose/may expose/ I'll fix when applying. > Take advantage of this and get rid of the tlb lock and the trap-causing > tlbsx in > the htw miss handler by guarding with CPU_FTR_SMT, as it's > already being done in the bolted tlb1 miss handler. It's also possible that some non-virtualized workloads may also benefit from getting rid of the lock more than they benefit from enabling SMT (or perform better without SMT for other reasons). -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
