IOAT and Intel's DMA engine driver is very IOAT specific in places.. I had a peek at it as I have a little interest in the concept; at least the two platforms Genesi has been supporting (Pegasos and Efika) have quite competant DMA engines which are woefully underused (i.e. not at all).
There exists a Marvell DMA driver somewhere (I have a copy, someone on this list posted it about a year ago) and while the MPC5200B doesn't have explicit support for DMA from memory to memory (although memory to SRAM might work in chunks, or memory to a FIFO wired as a loopback like in the docs..??) There is so much you can do with most SoC DMA controllers, and it's not even limited to PowerPC (most ARM/XScale SoCs have very capable devices inside too). I can only imagine that nobody got excited over IOAT because the entire programming interface stinks of "offloading gigabit ethernet" and not much else. -- Matt Sealey <[EMAIL PROTECTED]> Genesi, Manager, Developer Relations Arnd Bergmann wrote: > On Sunday 24 June 2007, Clifford Wolf wrote: >> I'm working on an MPC8349E based project and as some of you might know this >> chip has a four channel (bus-) memory-to-memory DMA controller. >> >> Unfortunately the linux kernel is atm lacking a generic interface for such >> DMA controllers. > > So what's wrong with the include/linux/dmaengine.h API? I thought it was > designed to cover this sort of DMA controller? > > Arnd <>< > _______________________________________________ > Linuxppc-embedded mailing list > Linuxppc-embedded@ozlabs.org > https://ozlabs.org/mailman/listinfo/linuxppc-embedded _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded