Hello,

I am running a 2.4.30 kernel rsynced from Monta Vista on a Xilinx 
VirtexIIPro FPGA.
My design includes a PLB2OPB (Processor Local Bus to On chip Peripheral 
Bus) bridge that is
capable of generating a bus error interrupt when an OPM slave device 
asserts it's bus error
signal.  The PLB2OPB bridge also has a set of "bus error status and 
address registers"
that are capable of capturing information regarding the type of error that 
occurred.

Has anyone implemented support  for this functionality in a 2.4.x kernel 
running on
VirtexIIPro FPGAs?


Thanks!
Keith


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