We are using a 4k7 pullup, and seem to have no problems. > -----Urspr?ngliche Nachricht----- > Von: David M?ller (ELSOFT AG) [mailto:d.mueller at elsoft.ch] > Gesendet: Dienstag, 19. Februar 2002 13:06 > An: David M?ller (ELSOFT AG) > Cc: andrew may; Armin; Stefan Roese; > linuxppc-embedded at lists.linuxppc.org > Betreff: Re: 405 MII-PHY communication problem (was: Re: PPC405gp enet > Soft Reset) > > > Hi > > The problem with the even-numbered PHY register addresses seems to be > caused by a too weak or totally missing pullup resistor on the MDIO line. > > David M?ller (ELSOFT AG) wrote: > > > > Hi > > > > andrew may wrote: > > > >> On Mon, Feb 11, 2002 at 12:55:05PM +0100, David M?ller (ELSOFT > AG) wrote: > >> > >>> Hi > >>> > >>> andrew may wrote: > >>> > >>>> Here is a log from ppcboot since it is easy to test this there > >>>> without doing > >>>> a kernel build. My phy is at address 0x1f. > >>>> > >>>> => mii read 0x1 2 > >>>> 07FF > >>>> => mii read 0x1 3 > >>>> read err 3 > >>>> a2: read: EMAC_STACR=0xffffc023, i=2 > >>>> Error reading from the PHY > >>>> 07FF > >>>> > >>>> > >>> I'm seeing this error too on our boards. But i'm not certain, > if it's a > >>> problem of the MII controller in the 405 or a problem of the LXT971. > >>> What revision of the 405 do you have? What clock frequency your 405 > >>> run at? > >>> > > [old stuff deleted] > > > > Dave > >
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