Dan Malek writes: > The bottleneck is the protocol and application processing in the PPC core.
So has anyone had a chance to look at where exactly in the TCP/IP stack the bottleneck is since this was last discussed? Surely a 50 MHz part with an on-chip 100 Mbps Ethernet controller has enough grunt to keep up with a single TCP/IP connection. > Just write a program (nttcp works) to benchmark using the local > loopback device. That will tell you what the processor can > accomplish. Thanks for the suggestion. I ran my tcp test through the loop device on the 50 MHz 860T CLLF board, and it gives a little over 4 Mbytes/sec. So Dan's absolutely right as usual; the problem isn't in the FEC, it's in the protocol stack. Somewhere. Any suggestions? Thanks, Graham -- Graham Stoney Principal Hardware/Software Engineer Canon Information Systems Research Australia Ph: +61 2 9805 2909 Fax: +61 2 9805 2929 ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
