On Wed, 2004-12-08 at 05:15, Robin Gilks wrote: > Greetings > > Any Freescale lurkers out there? > > The mpc866 manual implies that if the internal core times out an > external Transfer Acknowledge bus signal (by exerting the internally > generated Transfer Error Acknowledge signal) an exception is generated. > > I've tried extending the external TA signal well beyond 2040 clock > cycles the maximum timeout allows and I see the busses start up again > (indicationg that they are no longer waiting) but I don't see anything > on TEA and I don't get an exception thrown. > > Any clues? Manual error?, silicon error?, my brain error?
Did you enable the bus monitor in the SYPCR register? Jaap-Jan > > Cheers -- J.G.J. Boor Anton Philipsweg 1 Software Engineer 1223 KZ Hilversum AimSys bv tel. +31 35 689 1941 Postbus 2194, 1200 CD Hilversum mailto:jjboor at aimsys.nl