Daniel Jacobowitz wrote: > On Wed, Jul 18, 2007 at 12:59:42PM -0500, Bill Gatliff wrote: > >> Now, I'm a little rusty on PPC asm (I've been doing a lot of ARM >> lately), but it looks to me like the kernel is setting bit 0 in CR0 >> (oris r10, r10, 0x1000) a.k.a LT, but the user side is looking at CR0 >> (bnslr+) bit 3 a.k.a. SO. Or maybe the other way around, I'm not sure >> after reading Sections 1.2 and 2.1 of the Programming Environments manual. >> > > It's not checking for restart here - userspace isn't supposed to have to. > It's probably checking for error. Check for the bit of kernel code > that's supposed to back you up two instructions. > >
I don't see it in this kernel. What I see is this after the call to the syscall handler: li r10,-_LAST_ERRNO cmpl 0,r3,r10 blt 30f neg r3,r3 cmpi 0,r3,ERESTARTNOHAND bne 22f li r3,EINTR 22: lwz r10,_CCR(r1) /* Set SO bit in CR */ oris r10,r10,0x1000 stw r10,_CCR(r1) 30: stw r3,GPR3(r1) /* Update return value */ b ret_from_except 66: li r3,ENOSYS b 22b ? -- Bill Gatliff [EMAIL PROTECTED] _______________________________________________ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded