Lite5200B and Carmine Board PCI problem

Dr. Thomas Fiksel Tue, 11 Sep 2007 02:16:36 -0700

Hi Linuxppc-embedded,

I'm trying to run a Fujitsu Carmine Evaluation Board MB86297-EB01 on a Freescale Lite5200B board. With a 'standard' Linux kernel 2.4 or 2.6 there are problems while allocating/maping of the PCI memory space. The Carmine board requires 2 PCI IO space segments of 256 byte each, 1 PCI memory space segment of 256 MByte and 1 PCI memory space segment of 64 MByte.


The U-Boot and kernel log shows :

Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.18.00   0x10cf     0x202b     Display controller      0x80
00.1a.00   0x1057     0x5809     Bridge device           0x80
...
PCI: Probing PCI hardware
...
PCI:00:18.0 Resource 0 [00000000-000000ff] is unassigned
PCI:00:18.0 Resource 1 [00000000-000000ff] is unassigned
PCI:00:18.0 Resource 2 [00000000-0fffffff] is unassigned
PCI:00:18.0 Resource 3 [00000000-03ffffff] is unassigned
PCI:00:1a.0 Resource 0 [00000000-0003ffff] is unassigned
PCI:00:1a.0 Resource 1 [00000000-3fffffff] is unassigned

PCI: bridge rsrc 50000000..50ffffff (100), parent c015debc, resource c027f038 PCI: bridge rsrc 40000000..4fffffff (200), parent c015ded8, resource c027f054

PCI: moved device 00:18.0 resource 0 (101) to 50000000
  got res[50000000:500000ff] for resource 0 of PCI device 10cf:202b
PCI: moved device 00:18.0 resource 1 (101) to 50000400
  got res[50000400:500004ff] for resource 1 of PCI device 10cf:202b
PCI: moved device 00:18.0 resource 2 (1208) to 40000000
  got res[40000000:4fffffff] for resource 2 of PCI device 10cf:202b
PCI: Failed to allocate resource 3(50000000-4fffffff) for 00:18.0

Because the PCI bridge shows only 256 MByte available memory area it is clear that the PCI memory space segment of 64 MByte (resource 3) is not allocated/mapped.

I tried to change the constants MPC5xxx_PCI_MEM_START and MPC5xxx_PCI_MEM_END constants (and other constants) in the related *.h file for arch/ppc/kernel/mpc5xxx_pci.c, recompiled the kernel and run it again.


Now the U-Boot and kernel log shows :

Scanning PCI devices on bus 0
BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
_____________________________________________________________
00.18.00   0x10cf     0x202b     Display controller      0x80
00.1a.00   0x1057     0x5809     Bridge device           0x80
...
PCI: Probing PCI hardware
...
PCI:00:18.0 Resource 0 [00000000-000000ff] is unassigned
PCI:00:18.0 Resource 1 [00000000-000000ff] is unassigned
PCI:00:18.0 Resource 2 [00000000-0fffffff] is unassigned
PCI:00:18.0 Resource 3 [00000000-03ffffff] is unassigned
PCI:00:1a.0 Resource 0 [00000000-0003ffff] is unassigned
PCI:00:1a.0 Resource 1 [00000000-3fffffff] is unassigned

PCI: bridge rsrc 60000000..60ffffff (100), parent c015debc, resource c027f038 PCI: bridge rsrc 40000000..5fffffff (200), parent c015ded8, resource c027f054

PCI: moved device 00:18.0 resource 0 (101) to 60000000
  got res[60000000:600000ff] for resource 0 of PCI device 10cf:202b
PCI: moved device 00:18.0 resource 1 (101) to 60000400
  got res[60000400:600004ff] for resource 1 of PCI device 10cf:202b
PCI: moved device 00:18.0 resource 2 (1208) to 40000000
  got res[40000000:4fffffff] for resource 2 of PCI device 10cf:202b
PCI: moved device 00:18.0 resource 3 (1208) to 50000000
  got res[50000000:53ffffff] for resource 3 of PCI device 10cf:202b

The PCI bridge shows now a creater area and both PCI memory space segments of 256 Mbyte and 64 Mbyte are mapped.

But in case if I have a simple read or write acces to the register of Carmine (which are located in the 64 Mbyte segment in adress region above 0x50000000) the kernel gives the oops :


MB86290: fb_init called.
MB86290: initialize called.
Oops: kernel access of bad area, sig: 11

NIP: C00C2630 XER: 00000000 LR: C0004F3C SP: C0549D80 REGS: c0549cd0 TRAP: 0300 Not tainted

MSR: 00001032 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 11
DAR: 00000020, DSISR: 20000000
TASK = c0548000[1] 'swapper' Last syscall: 120
last math 00000000 last altivec 00000000

GPR00: C0004F3C C0549D80 C0548000 00000000 C01B788C C0549E10 C014CA74 F0000C00 GPR08: F0001200 00000000 C0170000 00000020 C0190000 1008D5C4 0FFBA000 00000000 GPR16: 00000000 00000001 FFFFFFFF 007FFF00 00001032 00549E00 00000000 C0003E40 GPR24: C0004FA4 00000000 C0546420 C016EF20 C0549E10 C01B788C 24000000 C0546420

Call backtrace:
00009032 C0004F3C C0005000 C0003E40 C0004840 C00049B8 C00C2C14
C017ED7C C017E008 C017A140 C01725F4 C0172640 C0003970 C0006318
Kernel panic: Aiee, killing interrupt handler!

(Please note, the register access in the MB86290 driver code is still directed to the new register locations of the Carmine)



Therefore my questions:

It is allowed to increase the PCI bridge memory area by th simple change of MPC5xxx_PCI_MEM_START and MPC5xxx_PCI_MEM_END (and related constants)?

Or there are technical/hardware restrictions that this area can only be 256 MByte?

If not, must be changed other constants in the kernel configuration the increase the PCI bridge memory area?


There are known problems to plug the Carmine board in the Lite5200B board?

All jumpers on both boards are in default settings.

TIA

Thomas Fiksel

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Lite5200B and Carmine Board PCI problem

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