On Tue, 2013-12-03 at 20:53 +0100, Jiri Benc wrote:
> On Tue, 3 Dec 2013 20:27:46 +0100, Richard Cochran wrote:
> > You mentioned that you want to implement "hot pluggable" ports on top
> > of this series. Do you have anything yet? If so, please post that too,
> > so we can get the big picture.
> 
> Not yet, I'm working on it but there's still a long road ahead. My main
> motivation is to support bonding (which probably sounds scarier than it
> actually is), or alternatively, some other sort of automatic failover.
> 
> I'm currently experimenting with multiple PHC support, which is needed
> for the above and, perhaps more interestingly, would allow things like
> boundary clock with separate NICs. Of course, for this to be fully
> useful, phc2sys will need to be extended to follow ptp4l's state
> machine for individual interfaces. IIRC Jake expressed interest in such
> phc2sys extension, too
> (http://sourceforge.net/mailarchive/message.php?msg_id=31176225).
> 
> (I'm aware that boundary clock with separate but synchronized clocks is
> kind of out of PTP spec but I think it could be done in the way that's
> indistinguishable from the single clock from the other device's point
> of view, which is what really matters. There will be some impact on
> precision, of course.)
> 
>  Jiri
> 

I like this idea. I also think if we supported the "push" updates from
ptp4l, where ptp4l sends data over the management interface it would
enable the phc2sys to update it's internal state without requiring
polling as it could update whenever it receives data on the management
socket.

This type of setup also enables us to support phc2sys working "out of
the box" by automatically setting up the slave/master relationship so
that it doesn't require manual setup which can be a little confusing.

I do think that, while this is not in spec, it would be very useful for
boards which don't support boundary clock due to design. Obviously there
is some precision impact.. I am curious how difficult it would be to
measure that.

Regards,
Jake
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