Hello people,
We've been using ptp4l (1.6) here to synchronize a Xilinx MicroBlaze (soft
core) processor to a PTP master and have had some excellent results; once we
have a stable lock on the master, the maximum time jitter is only about 20
nanoseconds. And that was with only a simple and cheap 1 Gb switch.
Last week, we've upgraded the RTL of the board to use a 10 Gb MAC and found
that it introduced a fair amount of jitter on the PPS of the system compared
with 1Gb.
We believe this could be mitigated by introducing a second, "slower", set of PI
parameters that would kick in when your locking distance becomes within a
certain amount of ns (say about 70 ns, but should be configurable).
This would require either an update to the current PI servo or the introduction
of a new, adaptive PI(D) servo.
I'm capable enough to write the code myself (whether my manager allows me to
spend the time for it is another matter) but Richard suggested I post this to
the list first to get some additional input.
Regards,
Nico.
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